A NOVEL ARCHITECTURE FOR OPTIMIZED MBIST USING MARCHC ALGORITHM

Authors

  • Gongali Reddy Savithri Student, M.Tech in VLSI from Sai Rajeswari Institute of Technology J.N.T.U.A Affiliated College.
  • P. Hariobulesu Assistant Professor, Sai Rajeswari Institute of Technology, Proddatur.

Keywords:

March C, memory built-in self-test, memory BIST, MBIST.

Abstract

This  paper  will  present  a usage of MarchC algorithm to design  flexible  Memory  Built- in  Self-Test  (MBIST)  designed  to  be  easily  adaptable  to  specific memory  configurations  and  user  requirements, a flexible Memory Builtin Self-Test (MBIST) designed to be easily adaptable to specific memory configurations and user requirements. Its RTL code is generated by means of programming scripts that provide an easy to read code without the use of complex compiler directives. The basic architecture can be adapted to different schemes of test such as parallel, in which all the memories are tested concurrently, or sequential, in which the memories are tested one at the time. The basic architecture can be adapted to different schemes in which all the memories are tested concurrently, or sequential, in which the memories are tested one at the time using march C algoritham.

Index Terms— March C, memory built-in self-test, memory BIST, MBIST.

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Published

2019-06-14

How to Cite

Savithri, G. R., & Hariobulesu, P. (2019). A NOVEL ARCHITECTURE FOR OPTIMIZED MBIST USING MARCHC ALGORITHM. International Journal of Engineering Science and Generic Research, 5(3). Retrieved from https://www.ijesar.in/index.php/ijesar/article/view/165

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Articles