Design and Implementation of High performance XOR-Free Approach for Convolution Encoder

Abstract

This work presents a new algorithm to construct an XOR-Free architecture of a power efficient Convolutional Encoder. Optimization of XOR operators is the main concern while implementing polynomials over GF (2), which consumes a significant amount of dynamic power. The proposed approach completely removes the XOR-processing operation of a chosen non-systematic, feed-forward generator polynomial and reduces the logical operators, thereby the decoding cost.

Index Terms: Convolutional Codes, Common Sub-expression Elimination, Finite State Machine, Forward Error Correction, FPGA, HDL, Modulo Adder.