Priyanka GRE, Basamsetti A. IMPLEMENTATION OF OPTIMIZED VLSI ARCHITECTURE FOR CONVOLUTION AND DECONVOLUTION USING 32 BIT HIGHER RADIX ALGORITHM. IJESAR [Internet]. 2019Feb.3 [cited 2026Aug.24];5(1). Available from: https://www.ijesar.in/index.php/ijesar/article/view/157