2, M. V. 1, V. K. FPGA Implementation of Vedic ALU with Application Specific Reversible Gates. International Journal of Engineering Science and Generic Research, [S. l.], v. 2, n. 5, 2016. Disponível em: https://www.ijesar.in/index.php/ijesar/article/view/39. Acesso em: 3 oct. 2026.