KUMAR, P.; NIWARIA, K. 16 bit Design of adder subtractor circuit with optimized quantum cost using Feynman, PFAG and WG Gate. International Journal of Engineering Science and Generic Research, [S. l.], v. 4, n. 4, 2018. Disponível em: https://www.ijesar.in/index.php/ijesar/article/view/144. Acesso em: 22 aug. 2026.